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» Integrative Levels of Program Comprehension
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CP
2007
Springer
15 years 10 months ago
Scheduling Conditional Task Graphs
The increasing levels of system integration in Multi-Processor System-on-Chips (MPSoCs) emphasize the need for new design flows for efficient mapping of multi-task applications o...
Michele Lombardi, Michela Milano
IPPS
2006
IEEE
15 years 10 months ago
FPGA implementation of a license plate recognition SoC using automatically generated streaming accelerators
Modern FPGA platforms provide the hardware and software infrastructure for building a bus-based System on Chip (SoC) that meet the applications requirements. The designer can cust...
Nikolaos Bellas, Sek M. Chai, Malcolm Dwyer, Dan L...
CODES
2005
IEEE
15 years 10 months ago
The design of a smart imaging core for automotive and consumer applications: a case study
This paper describes the design of a low-cost, low-power smart imaging core that can be embedded in cameras. The core integrates an ARM 9 processor, a camera interface and two spe...
Wido Kruijtzer, Winfried Gehrke, Víctor Rey...
ASPDAC
2005
ACM
140views Hardware» more  ASPDAC 2005»
15 years 10 months ago
A multi-level transmission line network approach for multi-giga hertz clock distribution
-In high performance systems, process variations and fluctuations of operating environments have significant impact on the clock skew. Recently, hybrid structures of H-tree and m...
Hongyu Chen, Chung-Kuan Cheng
ATAL
2005
Springer
15 years 10 months ago
A BDI architecture for goal deliberation
One aspect of rational behavior is that agents can pursue multiple goals in parallel. Current BDI theory and systems do not provide a theoretical or architectural framework for de...
Alexander Pokahr, Lars Braubach, Winfried Lamersdo...