1411 search results - page 207 / 283 » Interactive Coding for Interactive Proofs |
SPAA
2009
ACM
15 years 10 months ago
2009
ACM
Transactional memory (TM) eliminates many problems associated with lock-based synchronization. Over recent years, much progress has been made in software and hardware implementati...
CODES
2008
IEEE
15 years 4 months ago
2008
IEEE
Software-controlled scratchpad memory is increasingly employed in embedded systems as it offers better timing predictability compared to caches. Previous scratchpad allocation alg...
CODES
2007
IEEE
15 years 4 months ago
2007
IEEE
Performance analysis of microprocessors is a critical step in defining the microarchitecture, prior to register-transfer-level (RTL) design. In complex chip multiprocessor systems...
CGO
2006
IEEE
15 years 3 months ago
2006
IEEE
The phase-ordering problem is a long standing issue for compiler writers. Most optimizing compilers typically have numerous different code-improving phases, many of which can be a...
CODES
2006
IEEE
15 years 3 months ago
2006
IEEE
Predicting timing behavior is key to efficient embedded real-time system design and verification. Especially memory accesses and co-processor calls over shared communication net...