154 search results - page 27 / 31 » Interconnect Optimization Strategies for High-Performance VL... |
GLVLSI
2010
IEEE
15 years 4 months ago
2010
IEEE
On-chip memory organization is one of the most important aspects that can influence the overall system behavior in multiprocessor systems. Following the trend set by high-perform...
109
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VLSID
2008
IEEE
16 years 4 hour ago
2008
IEEE
Today's feature-rich multimedia products require embedded system solution with complex System-on-Chip (SoC) to meet market expectations of high performance at a low cost and l...
96
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GLVLSI
2009
IEEE
15 years 6 months ago
2009
IEEE
In the context of nanoscale networks-on-chip (NoCs), each link implementation solution is not just a specific synthesis optimization technique with local performance and power im...
CGO
2007
IEEE
15 years 6 months ago
2007
IEEE
The demand for high performance has driven acyclic computation accelerators into extensive use in modern embedded and desktop architectures. Accelerators that are ideal from a sof...
118
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FPGA
2004
ACM
15 years 5 months ago
2004
ACM
In this paper, an efficient implementation of a high performance coarse-grain reconfigurable data-path on a mixed-granularity reconfigurable platform is presented. It consists of ...