154 search results - page 9 / 31 » Interconnect Optimization Strategies for High-Performance VL... |
129
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GLVLSI
2005
IEEE
15 years 11 months ago
2005
IEEE
The dependence of the propagation delay of the interlayer 3-D interconnects on the vertical through via location and length is investigated. For a variable vertical through via lo...
139
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ISVLSI
2006
IEEE
15 years 11 months ago
2006
IEEE
One major issue in designing image processors is to design a memory system that supports parallel access with a simple interconnection network. This paper presents a design method...
130
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ISCAS
2005
IEEE
15 years 11 months ago
2005
IEEE
— As across-chip wire delays exceed a clock cycle, interconnect pipelining becomes essential. However, the arbitrary insertion of flip-flops can change the differentials of lat...
158
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FCCM
2004
IEEE
15 years 9 months ago
2004
IEEE
Intrusion detection for network security is a computation intensive application demanding high system performance. System level design, a relatively unexplored field in this area,...
129
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GLVLSI
2003
IEEE
15 years 10 months ago
2003
IEEE
The current trends in high performance integrated circuits are towards faster and more powerful circuits in the giga-hertz range and even further. As the more complex Integrated C...