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» Interconnect design considerations for large NUCA caches
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ISCA
1996
IEEE
120views Hardware» more  ISCA 1996»
15 years 1 months ago
Missing the Memory Wall: The Case for Processor/Memory Integration
Current high performance computer systems use complex, large superscalar CPUs that interface to the main memory through a hierarchy of caches and interconnect systems. These CPU-c...
Ashley Saulsbury, Fong Pong, Andreas Nowatzyk
TPDS
2008
89views more  TPDS 2008»
14 years 9 months ago
Power/Performance/Thermal Design-Space Exploration for Multicore Architectures
Multicore architectures have been ruling the recent microprocessor design trend. This is due to different reasons: better performance, thread-level parallelism bounds in modern app...
Matteo Monchiero, Ramon Canal, Antonio Gonzá...
IPPS
2009
IEEE
15 years 4 months ago
Designing multi-leader-based Allgather algorithms for multi-core clusters
The increasing demand for computational cycles is being met by the use of multi-core processors. Having large number of cores per node necessitates multi-core aware designs to ext...
Krishna Chaitanya Kandalla, Hari Subramoni, Gopala...
VLSID
2002
IEEE
152views VLSI» more  VLSID 2002»
15 years 9 months ago
Verification of an Industrial CC-NUMA Server
Directed test program-based verification or formal verification methods are usually quite ineffective on large cachecoherent, non-uniform memory access (CC-NUMA) multiprocessors b...
Rajarshi Mukherjee, Yozo Nakayama, Toshiya Mima
PDP
2010
IEEE
15 years 4 months ago
Impact of Parallel Workloads on NoC Architecture Design
— Due to the multi-core processors, the importance of parallel workloads has increased considerably. However, manycore chips demand new interconnection strategies, since traditio...
Henrique Cota de Freitas, Lucas Mello Schnorr, Mar...