816 search results - page 24 / 164 » Interconnect design methods for memory design |
67
Voted
ICCD
2006
IEEE
15 years 6 months ago
2006
IEEE
— As the geometries of the transistors reach the physical limits of operation, one of the main design challenges of Systems-on-Chips (SoCs) will be to provide dynamic (run-time) ...
67
Voted
DAC
1999
ACM
15 years 10 months ago
1999
ACM
In this paper we present a new algorithm for computing reduced-order models of interconnect which utilizes the dominant controllable subspace of the system. The dominant controlla...
HPCC
2009
Springer
15 years 2 months ago
2009
Springer
Compared with lock-based synchronization techniques, Software Transactional Memory (STM) can significantly improve the programmability of multithreaded applications. Existing res...
ICCAD
2009
IEEE
14 years 7 months ago
2009
IEEE
Heat removal and power delivery have become two major reliability concerns in 3D stacked IC technology. For thermal problem, two possible solutions exist: thermal-through-silicon-...
SPDP
1991
IEEE
15 years 1 months ago
1991
IEEE
A number of experiments regarding the placement of instructions, private data and shared data in the Non-Uniform-Memory-Access multiprocessor, RP3 has been performed. Three Scient...