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ICCAD
1997
IEEE
86views Hardware» more  ICCAD 1997»
13 years 10 months ago
Interconnect design for deep submicron ICs
Interconnect has become the dominating factor in determining circuit performance and reliability in deep submicron designs. In this embedded tutorial, we first discuss the trends...
Jason Cong, David Zhigang Pan, Lei He, Cheng-Kok K...
ICCAD
2006
IEEE
124views Hardware» more  ICCAD 2006»
14 years 3 months ago
Robust system level design with analog platforms
An approach to robust system level mixed signal design is presented based on analog platforms. The bottom-up characterization phase of platform components provides accurate perfor...
Fernando De Bernardinis, Pierluigi Nuzzo, Alberto ...
EUROMICRO
1999
IEEE
13 years 10 months ago
Design Space Exploration in System Level Synthesis under Memory Constraints
This paper addresses the problem of component selection, task assignment and task scheduling for distributed embedded computer systems. Such systems have a large number of constra...
Radoslaw Szymanek, Krzysztof Kuchcinski
ISCAS
2005
IEEE
158views Hardware» more  ISCAS 2005»
13 years 12 months ago
Designing optimized pipelined global interconnects: algorithms and methodology impact
— As across-chip wire delays exceed a clock cycle, interconnect pipelining becomes essential. However, the arbitrary insertion of flip-flops can change the differentials of lat...
Vidyasagar Nookala, Sachin S. Sapatnekar
ICCD
2006
IEEE
117views Hardware» more  ICCD 2006»
14 years 3 months ago
System-Level Energy Modeling for Heterogeneous Reconfigurable Chip Multiprocessors
—Field-Programmable Gate Array (FPGA) technology is characterized by continuous improvements that provide new opportunities in system design. Multiprocessors-ona-Programmable-Chi...
Xiaofang Wang, Sotirios G. Ziavras