8 search results - page 2 / 2 » Interconnect testing in cluster-based FPGA architectures |
100
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FPL
2009
Springer
15 years 4 months ago
2009
Springer
In this paper we present a verification platform designed for HyperTransport 3.x (HT3) applications. HyperTransport 3.x is a very low latency and high bandwidth chip-tochip interc...
89
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AHS
2006
IEEE
15 years 5 months ago
2006
IEEE
Domain-specific reconfigurable arrays have shown to provide an efficient trade-off between flexibility of FPGA and performance of ASIC circuit. Nonetheless, the design of these he...
120
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DAC
2006
ACM
15 years 1 months ago
2006
ACM
With the growing complexity in consumer embedded products and the improvements in process technology, Multi-Processor SystemOn-Chip (MPSoC) architectures have become widespread. T...