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» Interconnect-power dissipation in a microprocessor
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ISCA
2008
IEEE
130views Hardware» more  ISCA 2008»
15 years 3 months ago
Corona: System Implications of Emerging Nanophotonic Technology
We expect that many-core microprocessors will push performance per chip from the 10 gigaflop to the 10 teraflop range in the coming decade. To support this increased performance...
Dana Vantrease, Robert Schreiber, Matteo Monchiero...
92
Voted
ICCD
2006
IEEE
312views Hardware» more  ICCD 2006»
15 years 6 months ago
A Design Approach for Fine-grained Run-Time Power Gating using Locally Extracted Sleep Signals
— Leakage power dissipation becomes a dominant component in operation power in nanometer devices. This paper describes a design methodology to implement runtime power gating in a...
Kimiyoshi Usami, Naoaki Ohkubo
MICRO
1999
IEEE
71views Hardware» more  MICRO 1999»
15 years 1 months ago
Selective Cache Ways: On-Demand Cache Resource Allocation
Increasing levels of microprocessor power dissipation call for new approaches at the architectural level that save energy by better matching of on-chip resources to application re...
David H. Albonesi
GLVLSI
1998
IEEE
122views VLSI» more  GLVLSI 1998»
15 years 1 months ago
Reducing Power Consumption of Dedicated Processors Through Instruction Set Encoding
With the increased clock frequency of modern, high-performance processors over 500 MHz, in some cases, limiting the power dissipation has become the most stringent design target. ...
Luca Benini, Giovanni De Micheli, Alberto Macii, E...
PACS
2000
Springer
132views Hardware» more  PACS 2000»
15 years 1 months ago
An Adaptive Issue Queue for Reduced Power at High Performance
Increasing power dissipation has become a major constraint for future performance gains in the design of microprocessors. In this paper, we present the circuit design of an issue ...
Alper Buyuktosunoglu, Stanley Schuster, David Broo...