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» Interconnecting Computers: Architecture, Technology, and Eco...
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119
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ISORC
2009
IEEE
15 years 6 months ago
Adding Timing-Awareness to AUTOSAR Basic-Software -- A Component Based Approach
AUTOSAR as specified in its current version fosters timing-constraints at application level to support the development of real-time automotive applications. However, the standard...
Dietmar Schreiner, Markus Schordan, Jens Knoop
DAC
2009
ACM
16 years 20 days ago
A fully polynomial time approximation scheme for timing driven minimum cost buffer insertion
As VLSI technology enters the nanoscale regime, interconnect delay has become the bottleneck of the circuit timing. As one of the most powerful techniques for interconnect optimiz...
Shiyan Hu, Zhuo Li, Charles J. Alpert
DAC
2008
ACM
16 years 20 days ago
An integrated nonlinear placement framework with congestion and porosity aware buffer planning
Due to skewed scaling of interconnect delay and cell delay with technology scaling, modern VLSI timing closure requires use of extensive buffer insertion. Inserting a large number...
Tung-Chieh Chen, Ashutosh Chakraborty, David Z. Pa...
141
Voted

Publication
295views
13 years 10 months ago
The Age of Analog Networks.
A large class of systems of biological and technological relevance can be described as analog networks, that is, collections of dynamic devices interconnected by links of varying s...
Claudio Mattiussi, Daniel Marbach, Peter Dürr, Da...
IPPS
1998
IEEE
15 years 3 months ago
Failure Recovery for Distributed Processes in Single System Image Clusters
Single System Image (SSI) Distributed Operating Systems have been the subject of increasing interest in recent years. This interest has been fueled primarily by the trend towards ...
Jeffrey Zabarsky