60 search results - page 8 / 12 » Interface Design for Rationally Clocked GALS Systems |
HICSS
2003
IEEE
15 years 5 months ago
2003
IEEE
This paper describes the system architecture development process in an international ICT company, which is building a comprehensive e-business system for its customers. The implem...
ISORC
1998
IEEE
15 years 3 months ago
1998
IEEE
The Time-Triggered Architecture (TTA) provides a computing infrastructure for the design and implementation of dependable distributed embedded systems. A large real-time applicatio...
VLSID
2006
IEEE
15 years 5 months ago
2006
IEEE
This tutorial focuses on advanced techniques to cope with the complexity of designing modern digital chips which are complete systems often containing multiple processors, complex...
SUTC
2010
IEEE
15 years 3 months ago
2010
IEEE
—To maximize the communication throughput for wireless sensing systems, designers have attempted various combinations of protocol design and manual code optimization. Although th...
IWSOC
2005
IEEE
15 years 5 months ago
2005
IEEE
This paper presents a case study of a single-chip 3G WCDMA/FDD basestation implementation based on a circuit-switched network on chip. As the amount of transistors on a chip conti...