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» Interior-Point Methods in Parallel Computation
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IPPS
1998
IEEE
15 years 7 months ago
PACE: Processor Architectures for Circuit Emulation
We describe a family of reconfigurable parallel architectures for logic emulation. They are supposed to be applicable like conventional FPGAs, while covering a larger range of circ...
Reiner Kolla, Oliver Springauf
CLUSTER
2004
IEEE
15 years 3 months ago
MPI/FT: A Model-Based Approach to Low-Overhead Fault Tolerant Message-Passing Middleware
Fault tolerance in parallel systems has traditionally been achieved through a combination of redundancy and checkpointing methods. This notion has also been extended to message-pas...
Rajanikanth Batchu, Yoginder S. Dandass, Anthony S...
HIPC
2009
Springer
15 years 1 months ago
Continuous performance monitoring for large-scale parallel applications
Traditional performance analysis techniques are performed after a parallel program has completed. In this paper, we describe an online method for continuously monitoring the perfor...
Isaac Dooley, Chee Wai Lee, Laxmikant V. Kal&eacut...
161
Voted
TOG
2012
271views Communications» more  TOG 2012»
13 years 5 months ago
Mass splitting for jitter-free parallel rigid body simulation
We present a parallel iterative rigid body solver that avoids common artifacts at low iteration counts. In large or real-time simulations, iteration is often terminated before con...
Richard Tonge, Feodor Benevolenski, Andrey Voroshi...
161
Voted
SC
2004
ACM
15 years 8 months ago
A Parallel Visualization Pipeline for Terascale Earthquake Simulations
This paper presents a parallel visualization pipeline implemented at the Pittsburgh Supercomputing Center (PSC) for studying the largest earthquake simulation ever performed. The ...
Hongfeng Yu, Kwan-Liu Ma, Joel Welling