In this paper, we introduce the use of slow-silent virtual channels to reduce the switching power of on-chip networks while keeping the leakage power small. Adding virtual channel...
The virtual channel flow control (VCFC) provides an efficient implementation for on-chip networks. However, allocating the virtual channels (VCs) uniformly results in a waste of a...
Until very recently, microprocessor designs were computation-centric. On-chip communication was frequently ignored. This was because of fast, single-cycle on-chip communication. T...
We have proposed (, )-based flow regulation to reduce delay and backlog bounds in SoC architectures, where bounds the traffic burstiness and the traffic rate. The regulation is co...
Fahimeh Jafari, Zhonghai Lu, Axel Jantsch, Mohamma...
Trace buffer technology allows tracking the values of a few number of state elements inside a chip within a desired time window, which is used to analyze logic errors during post-s...