40 search results - page 8 / 8 » Internet-Router Buffered Crossbars Based on Networks on Chip |
CODES
2003
IEEE
15 years 2 months ago
2003
IEEE
Ever increasing complexity and heterogeneity of SoC platforms require diversified on-chip communication schemes beyond the currently omnipresent shared bus architectures. To prev...
DAC
2009
ACM
15 years 2 months ago
2009
ACM
Process scaling has given designers billions of transistors to work with. As feature sizes near the atomic scale, extensive variation and wearout inevitably make margining unecono...
ISCAS
2005
IEEE
15 years 2 months ago
2005
IEEE
Abstract- This paper describes the implementation of an areaefficient and protected user memory-mapped network interface, the pbuf (Parcel Buffer), for the Data IntensiVe Architect...
FPL
2005
Springer
15 years 2 months ago
2005
Springer
A parallel MPEG-4 Simple Profile encoder for FPGA based multiprocessor System-on-Chip (SOC) is presented. The goal is a computationally scalable framework independent of platform....
CLUSTER
2000
IEEE
15 years 1 months ago
2000
IEEE
Most clusters so far have used WAN or LAN-based network products for communication due to their market availability. However, they do not always match communication patterns in cl...