928 search results - page 47 / 186 » Interpolation-sequence based model checking |
DATE
2007
IEEE
15 years 4 months ago
2007
IEEE
Formal verification is an important issue in circuit and system design. In this context, Bounded Model Checking (BMC) is one of the most successful techniques. But even if all sp...
TACAS
2004
Springer
15 years 3 months ago
2004
Springer
We present a method of deriving Craig interpolants from proofs in the quantifier-free theory of linear inequality and uninterpreted function symbols, and an interpolating theorem...
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CAV
2004
Springer
15 years 3 months ago
2004
Springer
Abstract. We propose a new statistical approach to analyzing stochastic systems against specifications given in a sublogic of continuous stochastic logic (CSL). Unlike past numeri...
FMSD
2006
14 years 10 months ago
2006
Two base algorithms are known for reachability verification over timed automata. They are called forward and backwards, and traverse the automata edges using either successors or p...
FMCAD
2004
Springer
15 years 3 months ago
2004
Springer
Most symbolic model checkers are based on either Binary Decision Diagrams (BDDs), which may grow exponentially large, or Satisfiability (SAT) solvers, whose time requirements rapi...