Sciweavers

503 search results - page 44 / 101
» Interpolative Boolean Logic
Sort
View
104
Voted
DAC
2006
ACM
16 years 1 months ago
Predicate learning and selective theory deduction for a difference logic solver
Design and verification of systems at the Register-Transfer (RT) or behavioral level require the ability to reason at higher levels of abstraction. Difference logic consists of an...
Chao Wang, Aarti Gupta, Malay K. Ganai
ICCAD
1991
IEEE
100views Hardware» more  ICCAD 1991»
15 years 4 months ago
Layout Driven Logic Restructuring/Decomposition
As feature sizes decrease and chip sizes increase, the area and performance of chips become dominated by the interconnect. In spite of this trend, most existing synthesis systems ...
Massoud Pedram, Narasimha B. Bhat
CF
2008
ACM
15 years 2 months ago
Exact combinational logic synthesis and non-standard circuit design
Using a new exact synthesizer that automatically induces minimal universal boolean function libraries, we introduce two indicators for comparing their expressiveness: the first ba...
Paul Tarau, Brenda Luderman
91
Voted
DAC
2003
ACM
16 years 1 months ago
A hybrid SAT-based decision procedure for separation logic with uninterpreted functions
SAT-based decision procedures for quantifier-free fragments of firstorder logic have proved to be useful in formal verification. These decision procedures are either based on enco...
Sanjit A. Seshia, Shuvendu K. Lahiri, Randal E. Br...
ACSD
2004
IEEE
113views Hardware» more  ACSD 2004»
15 years 4 months ago
Logic Synthesis for Asynchronous Circuits Based on Petri Net Unfoldings and Incremental SAT
The behaviour of asynchronous circuits is often described by Signal Transition Graphs (STGs), which are Petri nets whose transitions are interpreted as rising and falling edges of...
Victor Khomenko, Maciej Koutny, Alexandre Yakovlev