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96
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CAV
2004
Springer
99views Hardware» more  CAV 2004»
15 years 6 months ago
Range Allocation for Separation Logic
Abstract. Separation Logic consists of a Boolean combination of predicates of the form vi ≥ vj +c where c is a constant and vi, vj are variables of some ordered infinite type li...
Muralidhar Talupur, Nishant Sinha, Ofer Strichman,...
CODES
2003
IEEE
15 years 6 months ago
A codesigned on-chip logic minimizer
Boolean logic minimization is traditionally used in logic synthesis tools running on powerful desktop computers. However, logic minimization has recently been proposed for dynamic...
Roman L. Lysecky, Frank Vahid
115
Voted
ICTCS
2003
Springer
15 years 6 months ago
On the Computational Complexity of Cut-Elimination in Linear Logic
Abstract. Given two proofs in a logical system with a confluent cutelimination procedure, the cut-elimination problem (CEP) is to decide whether these proofs reduce to the same no...
Harry G. Mairson, Kazushige Terui
91
Voted
GLVLSI
2007
IEEE
135views VLSI» more  GLVLSI 2007»
15 years 7 months ago
Exact sat-based toffoli network synthesis
Compact realizations of reversible logic functions are of interest in the design of quantum computers. Such reversible functions are realized as a cascade of Toffoli gates. In th...
Daniel Große, Xiaobo Chen, Gerhard W. Dueck,...
PPDP
2010
Springer
14 years 11 months ago
A declarative approach to robust weighted Max-SAT
The presence of uncertainty in the real world makes robustness to be a desired property of solutions to constraint satisfaction problems. Roughly speaking, a solution is robust if...
Miquel Bofill, Dídac Busquets, Mateu Villar...