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DLT
2010
14 years 11 months ago
Around Dot Depth Two
It is known that the languages definable by formulae of the logics FO2[<,S], 2[<,S], LTL[F,P,X,Y] are exactly the variety DAD. Automata for this class are not known, nor is i...
Kamal Lodaya, Paritosh K. Pandya, Simoni S. Shah
87
Voted
ICPPW
2008
IEEE
15 years 3 months ago
Replay-Based Synchronization of Timestamps in Event Traces of Massively Parallel Applications
Event traces are helpful in understanding the performance behavior of message-passing applications since they allow in-depth analyses of communication and synchronization patterns...
Daniel Becker, John C. Linford, Rolf Rabenseifner,...
CADE
2009
Springer
15 years 4 months ago
Complexity and Algorithms for Monomial and Clausal Predicate Abstraction
predicate abstraction Shuvendu K. Lahiri and Shaz Qadeer Microsoft Research In this paper, we investigate the asymptotic complexity of various predicate abstraction problems relati...
Shuvendu K. Lahiri, Shaz Qadeer
ISMVL
2009
IEEE
124views Hardware» more  ISMVL 2009»
15 years 4 months ago
Equivalence Checking of Reversible Circuits
Determining the equivalence of reversible circuits designed to meet a common specification is considered. The circuits’ primary inputs and outputs must be in pure logic states ...
Robert Wille, Daniel Große, D. Michael Mille...
DATE
2007
IEEE
92views Hardware» more  DATE 2007»
15 years 3 months ago
Overcoming glitches and dissipation timing skews in design of DPA-resistant cryptographic hardware
Cryptographic embedded systems are vulnerable to Differential Power Analysis (DPA) attacks. In this paper, we propose a logic design style, called as Precharge Masked Reed-Muller ...
Kuan Jen Lin, Shan Chien Fang, Shih Hsien Yang, Ch...