503 search results - page 85 / 101 » Interpolative Boolean Logic |
ICSE
2007
IEEE-ACM
15 years 9 months ago
2007
IEEE-ACM
The Alloy tool-set has been gaining popularity as an alternative to traditional manual testing and checking for design correctness. Alloy uses a first-order relational logic for m...
GLVLSI
2007
IEEE
15 years 3 months ago
2007
IEEE
This paper proposes a library-free technology mapping algorithm to reduce delay in combinational circuits. The algorithm reduces the overall number of series transistors through t...
ICDM
2003
IEEE
15 years 2 months ago
2003
IEEE
A major obstacle to fully integrated deployment of many data mining algorithms is the assumption that data sits in a single table, even though most real-world databases have compl...
DATE
1999
IEEE
15 years 1 months ago
1999
IEEE
The problem of checking the equivalence of combinational circuits is of key significance in the verification of digital circuits. In recent years, several approaches have been pro...
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ICLP
1997
Springer
15 years 1 months ago
1997
Springer
Kowalski and Sergot’s Event Calculus (EC) is a simple temporal formalism that, given a set of event occurrences, derives the maximal validity intervals (MVIs) over which propert...