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PDP
2009
IEEE
15 years 11 months ago
High Throughput Intra-Node MPI Communication with Open-MX
Abstract—The increasing number of cores per node in highperformance computing requires an efficient intra-node MPI communication subsystem. Most existing MPI implementations rel...
Brice Goglin
CCGRID
2008
IEEE
15 years 11 months ago
Xen-Based HPC: A Parallel I/O Perspective
Virtualization using Xen-based virtual machine environment has yet to permeate the field of high performance computing (HPC). One major requirement for HPC is the availability of ...
Weikuan Yu, Jeffrey S. Vetter
RECONFIG
2008
IEEE
140views VLSI» more  RECONFIG 2008»
15 years 11 months ago
Generalised Parallel Bilinear Interpolation Architecture for Vision Systems
Bilinear interpolation is widely used in computer vision for extracting pixel values for positions that lie off the pixel grid in an image. For each sub-pixel, the values of four ...
Suhaib A. Fahmy
ASAP
2007
IEEE
135views Hardware» more  ASAP 2007»
15 years 11 months ago
An Application Specific Memory Characterization Technique for Co-processor Accelerators
Commodity accelerator technologies including reconfigurable devices provide an order of magnitude performance improvement compared to mainstream microprocessor systems. A number o...
Sadaf R. Alam, Jeffrey S. Vetter, Melissa C. Smith
106
Voted
ASAP
2007
IEEE
136views Hardware» more  ASAP 2007»
15 years 11 months ago
0/1 Knapsack on Hardware: A Complete Solution
We present a memory efficient, practical, systolic, parallel architecture for the complete 0/1 knapsack dynamic programming problem, including backtracking. This problem was inte...
K. Nibbelink, S. Rajopadhye, R. McConnell