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» Introspective 3D chips
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BIRTHDAY
2012
Springer
13 years 5 months ago
A Qualitative Security Analysis of a New Class of 3-D Integrated Crypto Co-processors
3-D integration presents many new opportunities for architects and embedded systems designers. However, 3-D integration has not yet been explored by the cryptographic hardware com...
Jonathan Valamehr, Ted Huffmire, Cynthia E. Irvine...
DAC
2011
ACM
13 years 9 months ago
Fault-tolerant 3D clock network
Clock tree synthesis is one of the most important and challenging problems in 3D ICs. The clock signals have to be delivered by through-silicon vias (TSVs) to different tiers with...
Chiao-Ling Lung, Yu-Shih Su, Shih-Hsiu Huang, Yiyu...
ASPDAC
2009
ACM
108views Hardware» more  ASPDAC 2009»
15 years 4 months ago
Synthesis of networks on chips for 3D systems on chips
Three-dimensional stacking of silicon layers is emerging as a promising solution to handle the design complexity and heterogeneity of Systems on Chips (SoCs). Networks on Chips (N...
Srinivasan Murali, Ciprian Seiculescu, Luca Benini...
ICPP
2008
IEEE
15 years 4 months ago
Thermal Management for 3D Processors via Task Scheduling
A rising horizon in chip fabrication is the 3D integration technology. It stacks two or more dies vertically with a dense, high-speed interface to increase the device density and ...
Xiuyi Zhou, Yi Xu, Yu Du, Youtao Zhang, Jun Yang 0...
NANONET
2009
Springer
199views Chemistry» more  NANONET 2009»
15 years 2 months ago
Through Silicon Via-Based Grid for Thermal Control in 3D Chips
3D stacked chips have become a promising integration technology for modern systems. The complexity reached in multi-processor systems has increased the communication delays between...
José L. Ayala, Arvind Sridhar, Vinod Pangra...