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DSD
2010
IEEE
112views Hardware» more  DSD 2010»
15 years 15 days ago
Re-NUCA: Boosting CMP Performance Through Block Replication
— Chip Multiprocessor (CMP) systems have become the reference architecture for designing micro-processors, thanks to the improvements in semiconductor nanotechnology that have co...
Pierfrancesco Foglia, Cosimo Antonio Prete, Marco ...
VLDB
2012
ACM
360views Database» more  VLDB 2012»
13 years 9 months ago
An adaptive updating protocol for reducing moving object database workload
In the last decade, spatio-temporal database research focuses on the design of effective and efficient indexing structures in support of location-based queries such as predictive...
Su Chen, Beng Chin Ooi, Zhenjie Zhang
HPDC
2012
IEEE
13 years 4 months ago
Understanding the effects and implications of compute node related failures in hadoop
Hadoop has become a critical component in today’s cloud environment. Ensuring good performance for Hadoop is paramount for the wide-range of applications built on top of it. In ...
Florin Dinu, T. S. Eugene Ng
DAC
2003
ACM
16 years 2 months ago
A survey of techniques for energy efficient on-chip communication
Interconnects have been shown to be a dominant source of energy consumption in modern day System-on-Chip (SoC) designs. With a large (and growing) number of electronic systems bei...
Vijay Raghunathan, Mani B. Srivastava, Rajesh K. G...
HPCA
2006
IEEE
16 years 2 months ago
BulletProof: a defect-tolerant CMP switch architecture
As silicon technologies move into the nanometer regime, transistor reliability is expected to wane as devices become subject to extreme process variation, particle-induced transie...
Kypros Constantinides, Stephen Plaza, Jason A. Blo...