Sciweavers

2587 search results - page 490 / 518
» Intrusion Tolerant Systems
Sort
View
TDSC
2010
111views more  TDSC 2010»
14 years 10 months ago
Using Underutilized CPU Resources to Enhance Its Reliability
—Soft errors (or Transient faults) are temporary faults that arise in a circuit due to a variety of internal noise and external sources such as cosmic particle hits. Though soft ...
Avi Timor, Avi Mendelson, Yitzhak Birk, Neeraj Sur...
LCTRTS
2010
Springer
14 years 9 months ago
Compiler directed network-on-chip reliability enhancement for chip multiprocessors
Chip multiprocessors (CMPs) are expected to be the building blocks for future computer systems. While architecting these emerging CMPs is a challenging problem on its own, program...
Ozcan Ozturk, Mahmut T. Kandemir, Mary Jane Irwin,...
MICRO
2010
IEEE
270views Hardware» more  MICRO 2010»
14 years 9 months ago
Many-Thread Aware Prefetching Mechanisms for GPGPU Applications
Abstract-- We consider the problem of how to improve memory latency tolerance in massively multithreaded GPGPUs when the thread-level parallelism of an application is not sufficien...
Jaekyu Lee, Nagesh B. Lakshminarayana, Hyesoon Kim...
NOMS
2010
IEEE
201views Communications» more  NOMS 2010»
14 years 9 months ago
Checkpoint-based fault-tolerant infrastructure for virtualized service providers
Crash and omission failures are common in service providers: a disk can break down or a link can fail anytime. In addition, the probability of a node failure increases with the num...
Iñigo Goiri, Ferran Julià, Jordi Gui...
ICFEM
2009
Springer
14 years 9 months ago
Graded-CTL: Satisfiability and Symbolic Model Checking
In this paper we continue the study of a strict extension of the Computation Tree Logic, called graded-CTL, recently introduced by the same authors. This new logic augments the sta...
Alessandro Ferrante, Margherita Napoli, Mimmo Pare...