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» Invasive Patterns for Distributed Programs
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ICS
1993
Tsinghua U.
15 years 3 months ago
Anatomy of a Message in the Alewife Multiprocessor
Shared-memory provides a uniform and attractive mechanism for communication. For efficiency, it is often implemented with a layer of interpretive hardware on top of a message-pas...
John Kubiatowicz, Anant Agarwal
HPCC
2007
Springer
15 years 3 months ago
Concurrent Number Cruncher: An Efficient Sparse Linear Solver on the GPU
A wide class of geometry processing and PDE resolution methods needs to solve a linear system, where the non-zero pattern of the matrix is dictated by the connectivity matrix of th...
Luc Buatois, Guillaume Caumon, Bruno Lévy
96
Voted
ISHPC
2000
Springer
15 years 3 months ago
Loop Termination Prediction
Deeply pipelined high performance processors require highly accurate branch prediction to drive their instruction fetch. However there remains a class of events which are not easi...
Timothy Sherwood, Brad Calder
EUROPAR
2010
Springer
15 years 24 days ago
Efficient Address Mapping of Shared Cache for On-Chip Many-Core Architecture
Abstract. Performance of the on-chip cache is critical for processor. The multithread program model usually employed by on-chip many-core architectures may have effects on cache ac...
Fenglong Song, Dongrui Fan, Zhiyong Liu, Junchao Z...
HPDC
2008
IEEE
14 years 12 months ago
Code coverage, performance approximation and automatic recognition of idioms in scientific applications
Basic data flow patterns which we call idioms, such as stream, transpose, reduction, random access and stencil, are common in scientific numerical applications. We hypothesize tha...
Jiahua He, Allan Snavely, Rob F. Van der Wijngaart...