555 search results - page 22 / 111 » Iris Recognition Algorithm Optimized for Hardware Implementa... |
ASAP
2009
IEEE
15 years 8 months ago
2009
IEEE
—In this paper we consider a multiresolution filter and its realization on the Cell BE and GPUs. We not only present common and specific optimization strategies undertaken for ...
ISCAS
2002
IEEE
15 years 4 months ago
2002
IEEE
A variation of the differential steepest descent algorithm, here called the dithered linear search (DLS), is examined and applied to analog filter adaptation. The DLS algorithm is...
ATS
2001
IEEE
15 years 3 months ago
2001
IEEE
Test access is a major problem for core-based systemon-chip (SOC) designs. Since cores in an SOC are not directly accessible via chip inputs and outputs, special access mechanisms...
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ICDE
2009
IEEE
16 years 1 months ago
2009
IEEE
We present the architectural design and recent performance optimizations of a state of the art commercial database replication technology provided in Oracle Streams. The underlying...
IJCNN
2000
IEEE
15 years 4 months ago
2000
IEEE
In this paper, we propose a method to design a neural network(NN) by using a genetic algorithm(GA) and simulated annealing(SA). And also, in order to demonstrate the effectivenes...