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ISCAS
2006
IEEE
154views Hardware» more  ISCAS 2006»
15 years 9 months ago
A novel Fisher discriminant for biometrics recognition: 2DPCA plus 2DFLD
— this paper presents a novel image feature extraction and recognition method two dimensional linear discriminant analysis (2DLDA) in a much smaller subspace. Image representatio...
R. M. Mutelo, Li Chin Khor, Wai Lok Woo, Satnam Si...
SIGCOMM
2010
ACM
15 years 3 months ago
NapSAC: design and implementation of a power-proportional web cluster
Energy consumption is a major and costly problem in data centers. A large fraction of this energy goes to powering idle machines that are not doing any useful work. We identify tw...
Andrew Krioukov, Prashanth Mohan, Sara Alspaugh, L...
ASPDAC
2000
ACM
117views Hardware» more  ASPDAC 2000»
15 years 7 months ago
Improved algorithms for hypergraph bipartitioning
Multilevel Fiduccia-Mattheyses MLFM hypergraph partitioning 3, 22, 24 is a fundamental optimization in VLSI CAD physical design. The leading implementation, hMetis 23 , has sinc...
Andrew E. Caldwell, Andrew B. Kahng, Igor L. Marko...
SIPS
2006
IEEE
15 years 9 months ago
Automated Architectural Exploration for Signal Processing Algorithms
Abstract— This paper presents a design environment for efficiently generating application-specific Intellectual Property (IP) cores for system level signal processing algorithm...
Ramsey Hourani, Ravi Jenkal, W. Rhett Davis, Winse...
FCCM
1999
IEEE
111views VLSI» more  FCCM 1999»
15 years 7 months ago
Optimizing FPGA-Based Vector Product Designs
This paper presents a method, called multiple constant multiplier trees MCMTs, for producing optimized recon gurable hardware implementations of vector products. An algorithm for ...
Dan Benyamin, John D. Villasenor, Wayne Luk