555 search results - page 53 / 111 » Iris Recognition Algorithm Optimized for Hardware Implementa... |
120
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CLOUDCOM
2010
Springer
15 years 1 months ago
2010
Springer
Abstract--Commercial services for provisioning software components and virtual infrastructure in the cloud are emerging. For customers, this creates a multitude of possibilities fo...
150
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DATE
2006
IEEE
15 years 9 months ago
2006
IEEE
This paper presents an Application Specific Instruction Set Processor (ASIP) design for the implementation of a class of nonlinear image processing algorithms, the Retinex-like fi...
155
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FPL
2006
Springer
15 years 6 months ago
2006
Springer
Field programmable gate arrays (FPGAs), graphics processing units (GPUs) and Sony's PlayStation 2 vector units offer scope for hardware acceleration of applications. We compa...
101
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FPL
2009
Springer
15 years 7 months ago
2009
Springer
A simple image-processing application is implemented on the Ambric MPPA and an FPGA, using a similar implementation for both devices. FPGAs perform extremely well on this kind of ...
108
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DATE
2007
IEEE
15 years 9 months ago
2007
IEEE
Several research activities have recently emerged aiming to propose multiprocessor implementations in order to achieve flexible and high throughput parallel iterative decoding. Be...