555 search results - page 54 / 111 » Iris Recognition Algorithm Optimized for Hardware Implementa... |
109
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DATE
2000
IEEE
15 years 7 months ago
2000
IEEE
We address the problem of inserting repeaters, selected from a library, at feasible locations in a placed and routed network to meet user-specified delay constraints. We use mini...
124
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VLSID
2005
IEEE
16 years 3 months ago
2005
IEEE
This paper presents a highly efficient processor design methodology based on the LISA 2.0 language. Typically the architecture design phase is dominated by an iterative processor ...
152
Voted
ACMMSP
2006
ACM
15 years 9 months ago
2006
ACM
A blossoming paradigm for block-recursive matrix algorithms is presented that, at once, attains excellent performance measured by • time, • TLB misses, • L1 misses, • L2 m...
120
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ICCAD
2004
IEEE
16 years 1 days ago
2004
IEEE
The main goal of this paper is to develop deeper insights into viable placement-level optimization of routing. Two primary contributions are made. First, an experimental framework...
145
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DATE
2008
IEEE
15 years 4 months ago
2008
IEEE
Adaptive resource management is critical to ensuring the quality of real-time distributed applications, particularly for energy-constrained mobile handheld devices. In this contex...