Sciweavers

555 search results - page 66 / 111
» Iris Recognition Algorithm Optimized for Hardware Implementa...
Sort
View
IJCV
2007
179views more  IJCV 2007»
15 years 3 months ago
A Performance Study on Different Cost Aggregation Approaches Used in Real-Time Stereo Matching
Many vision applications require high-accuracy dense disparity maps in real-time and online. Due to time constraint, most real-time stereo applications rely on local winner-takes-a...
Minglun Gong, Ruigang Yang, Liang Wang 0002, Mingw...
LFP
1992
140views more  LFP 1992»
15 years 4 months ago
Global Tagging Optimization by Type Inference
Tag handling accounts for a substantial amount of execution cost in latently typed languages such as Common LISP and Scheme, especially on architectures that provide no special ha...
Fritz Henglein
SIGCOMM
2009
ACM
15 years 9 months ago
Optimizing the BSD routing system for parallel processing
The routing architecture of the original 4.4BSD [3] kernel has been deployed successfully without major design modification for over 15 years. In the unified routing architectur...
Qing Li, Kip Macy
102
Voted
DATE
2006
IEEE
110views Hardware» more  DATE 2006»
15 years 9 months ago
Multiprocessor synthesis for periodic hard real-time tasks under a given energy constraint
The energy-aware design for electronic systems has been an important issue in hardware and/or software implementations, especially for embedded systems. This paper targets a synth...
Heng-Ruey Hsu, Jian-Jia Chen, Tei-Wei Kuo
ICCAD
2008
IEEE
150views Hardware» more  ICCAD 2008»
15 years 12 months ago
Performance estimation and slack matching for pipelined asynchronous architectures with choice
— This paper presents a fast analytical method for estimating the throughput of pipelined asynchronous systems, and then applies that method to develop a fast solution to the pro...
Gennette Gill, Vishal Gupta, Montek Singh