Sciweavers

555 search results - page 95 / 111
» Iris Recognition Algorithm Optimized for Hardware Implementa...
Sort
View
ASPDAC
2005
ACM
113views Hardware» more  ASPDAC 2005»
15 years 3 months ago
Scalable interprocedural register allocation for high level synthesis
Abstract— The success of classical high level synthesis has been limited by the complexity of the applications it can handle, typically not large enough to necessitate the depart...
Rami Beidas, Jianwen Zhu
ISPD
1997
ACM
68views Hardware» more  ISPD 1997»
15 years 1 months ago
Faster minimization of linear wirelength for global placement
A linear wirelength objective more e ectively captures timing, congestion, and other global placement considerations than a squared wirelength objective. The GORDIAN-L cell placem...
Charles J. Alpert, Tony F. Chan, Dennis J.-H. Huan...
SIGMETRICS
2008
ACM
140views Hardware» more  SIGMETRICS 2008»
14 years 9 months ago
Scalable VPN routing via relaying
Enterprise customers are increasingly adopting MPLS (Multiprotocol Label Switching) VPN (Virtual Private Network) service that offers direct any-to-any reachability among the cust...
Changhoon Kim, Alexandre Gerber, Carsten Lund, Dan...
83
Voted
SIGMETRICS
2005
ACM
120views Hardware» more  SIGMETRICS 2005»
15 years 3 months ago
Automatic measurement of memory hierarchy parameters
The running time of many applications is dominated by the cost of memory operations. To optimize such applications for a given platform, it is necessary to have a detailed knowled...
Kamen Yotov, Keshav Pingali, Paul Stodghill
ICCAD
1997
IEEE
108views Hardware» more  ICCAD 1997»
15 years 1 months ago
Negative thinking by incremental problem solving: application to unate covering
We introduce a new technique to solve exactly a discrete optimization problem, based on the paradigm of “negative” thinking. The motivation is that when searching the space of...
Evguenii I. Goldberg, Luca P. Carloni, Tiziano Vil...