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ICCAD
1999
IEEE
86views Hardware» more  ICCAD 1999»
15 years 1 months ago
Clock skew scheduling for improved reliability via quadratic programming
This paper considers the problem of determining an optimal clock skew schedule for a synchronous VLSI circuit. A novel formulation of clock skew scheduling as a constrained quadrat...
Ivan S. Kourtev, Eby G. Friedman
ICCAD
1999
IEEE
148views Hardware» more  ICCAD 1999»
15 years 1 months ago
SAT based ATPG using fast justification and propagation in the implication graph
In this paper we present new methods for fast justification and propagation in the implication graph (IG) which is the core data structure of our SAT based implication engine. As ...
Paul Tafertshofer, Andreas Ganz
DATE
2008
IEEE
145views Hardware» more  DATE 2008»
15 years 4 months ago
Minimizing Virtual Channel Buffer for Routers in On-chip Communication Architectures
We present a novel methodology for design space exploration using a two-steps scheme to optimize the number of virtual channel buffers (buffers take the premier share of the route...
Mohammad Abdullah Al Faruque, Jörg Henkel
ISPD
2000
ACM
113views Hardware» more  ISPD 2000»
15 years 1 months ago
Floorplan area minimization using Lagrangian relaxation
modules can be handled in constraint graphs efficiently. This Floorplan area minimization is an important problem because many modules have shape flexibilities during the floorplan...
Fung Yu Young, Chris C. N. Chu, W. S. Luk, Y. C. W...
ISLPED
2010
ACM
202views Hardware» more  ISLPED 2010»
14 years 9 months ago
MODEST: a model for energy estimation under spatio-temporal variability
Estimation of static and dynamic energy of caches is critical for high-performance low-power designs. Commercial CAD tools performing energy estimation statically are not aware of...
Shrikanth Ganapathy, Ramon Canal, Antonio Gonz&aac...