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ICRA
2010
IEEE
189views Robotics» more  ICRA 2010»
14 years 8 months ago
Affordable SLAM through the co-design of hardware and methodology
— Simultaneous localization and mapping (SLAM) is a prominent feature for autonomous robots operating in undefined environments. Applications areas such as consumer robotics app...
Stéphane Magnenat, Valentin Longchamp, Mich...
73
Voted
JRTIP
2007
108views more  JRTIP 2007»
14 years 9 months ago
Real-time hardware acceleration of the trace transform
The trace transform is a novel algorithm that has been shown to be effective in a number of image recognition tasks. It is a generalisation of the Radon transform that has been wid...
Suhaib A. Fahmy, Christos-Savvas Bouganis, Peter Y...
93
Voted
IFIP12
2007
14 years 11 months ago
Hardware Natural Language Interface
In this paper an efficient architecture for natural language processing is presented, implemented in hardware using FPGAs (Field Programmable Gate Arrays). The system can receive s...
Christos Pavlatos, Alexandros C. Dimopoulos, Georg...
ISCAS
2007
IEEE
149views Hardware» more  ISCAS 2007»
15 years 3 months ago
Compact, Low Power Wireless Sensor Network System for Line Crossing Recognition
— Many application-specific wireless sensor network (WSN) systems require small size and low power features due to their limited resources, and their use in distributed, wireles...
Chung-Ching Shen, Roni Kupershtok, Bo Yang, Felice...
DATE
2003
IEEE
108views Hardware» more  DATE 2003»
15 years 2 months ago
HW/SW Partitioned Optimization and VLSI-FPGA Implementation of the MPEG-2 Video Decoder
In this paper, we propose an optimized real-time MPEG-2 video decoder. The decoder has been implemented in one FPGA device as a HW/SW partitioned system. We made time/power-consum...
Matjaz Verderber, Andrej Zemva, Damjan Lampret