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LCTRTS
2010
Springer
15 years 11 months ago
Operation and data mapping for CGRAs with multi-bank memory
Coarse Grain Reconfigurable Architectures (CGRAs) promise high performance at high power efficiency. They fulfil this promise by keeping the hardware extremely simple, and movi...
Yongjoo Kim, Jongeun Lee, Aviral Shrivastava, Yunh...
WOSP
2010
ACM
15 years 12 months ago
Reducing performance non-determinism via cache-aware page allocation strategies
Performance non-determinism in computer systems complicates evaluation, use, and even development of these systems. In performance evaluation via benchmarking and simulation, nond...
Michal Hocko, Tomás Kalibera
CODES
2009
IEEE
15 years 11 months ago
A variation-tolerant scheduler for better than worst-case behavioral synthesis
– There has been a recent shift in design paradigms, with many turning towards yield-driven approaches to synthesize and design systems. A major cause of this shift is the contin...
Jason Cong, Albert Liu, Bin Liu
139
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CODES
2005
IEEE
15 years 10 months ago
Retargetable generation of TLM bus interfaces for MP-SoC platforms
In order to meet flexibility, performance and energy efficiency constraints, future SoC (System-on-Chip) designs will contain an increasing number of heterogeneous processor cor...
Andreas Wieferink, Rainer Leupers, Gerd Ascheid, H...
ERLANG
2004
ACM
15 years 10 months ago
Structured programming using processes
Structured Programming techniques are applied to a personal accounting software application implemented in erlang as a demonstration of the utility of processes as design construc...
Jay Nelson