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PDSE
2000
116views more  PDSE 2000»
15 years 6 months ago
A CORBA-Based Architecture for Adding Dependability to Legacy Servers
This work presents a flexible, CORBA compliant Middle-Tier Server architecture which is capable of adding dependability (namely, reliability, availability, and performability) to ...
Domenico Cotroneo, Luigi Romano, Stefano Russo, Ni...
MICRO
2010
IEEE
215views Hardware» more  MICRO 2010»
15 years 3 months ago
A Task-Centric Memory Model for Scalable Accelerator Architectures
This paper presents a task-centric memory model for 1000-core compute accelerators. Visual computing applications are emerging as an important class of workloads that can exploit ...
John H. Kelm, Daniel R. Johnson, Steven S. Lumetta...
WWW
2008
ACM
16 years 5 months ago
Non-intrusive monitoring and service adaptation for WS-BPEL
Web service processes currently lack monitoring and dynamic (runtime) adaptation mechanisms. In highly dynamic processes, services frequently need to be exchanged due to a variety...
Oliver Moser, Florian Rosenberg, Schahram Dustdar
ASPLOS
2006
ACM
15 years 11 months ago
Software-based instruction caching for embedded processors
While hardware instruction caches are present in virtually all general-purpose and high-performance microprocessors today, many embedded processors use SRAM or scratchpad memories...
Jason E. Miller, Anant Agarwal
143
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ICCAD
2000
IEEE
119views Hardware» more  ICCAD 2000»
15 years 9 months ago
Synthesis of Operation-Centric Hardware Descriptions
Most hardware description frameworks, whether schematic or textual, use cooperating finite state machines (CFSM) as the underlying abstraction. In the CFSM framework, a designer ...
James C. Hoe, Arvind