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2009
Tsinghua U.
15 years 9 months ago
Dynamic task set partitioning based on balancing memory requirements to reduce power consumption
ABSTRACT Because of technology advances power consumption has emerged up as an important design issue in modern high-performance microprocessors. As a consequence, research on redu...
Diana Bautista, Julio Sahuquillo, Houcine Hassan, ...
CIDR
2009
167views Algorithms» more  CIDR 2009»
15 years 5 months ago
Unbundling Transaction Services in the Cloud
The traditional architecture for a DBMS engine has the recovery, concurrency control and access method code tightly bound together in a storage engine for records. We propose a di...
David B. Lomet, Alan Fekete, Gerhard Weikum, Micha...
ICDCS
2009
IEEE
15 years 2 months ago
The Case for Spam-Aware High Performance Mail Server Architecture
The email volume per mailbox has largely remained low and unchanged in the past several decades, and hence mail server performance has largely remained a secondary issue. The stee...
Abhinav Pathak, Syed Ali Raza Jafri, Y. Charlie Hu
ARCS
2009
Springer
15 years 11 months ago
Improving Memory Subsystem Performance Using ViVA: Virtual Vector Architecture
The disparity between microprocessor clock frequencies and memory latency is a primary reason why many demanding applications run well below peak achievable performance. Software c...
Joseph Gebis, Leonid Oliker, John Shalf, Samuel Wi...
PUC
2007
154views more  PUC 2007»
15 years 3 months ago
Point-of-capture archiving and editing of personal experiences from a mobile device
Personal experience computing is an emerging research area in computing support for capturing, archiving, editing, and utilizing of digital personal experiences. This paper presen...
Chon-in Wu, Chao-ming Teng, Yi-Chao Chen, Tung-yun...