103 search results - page 1 / 21 » Issues in Embedded DRAM Development and Applications |
105
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ISSS
1998
IEEE
15 years 4 months ago
1998
IEEE
After being niche markets for several years, application markets for one-chip integration of large DRAMs and logic circuits are growing very rapidly as the transition to 0.25
DFT
1999
IEEE
15 years 4 months ago
1999
IEEE
A programmable single-chip multiprocessor system for video coding has been developed. The system is implemented in a high-performance 0.25 m logic/embedded DRAM process. It integr...
GLVLSI
2003
IEEE
15 years 5 months ago
2003
IEEE
An embedded 40 MHz FIFO buffer for use in mixed-signal information processing applications is presented. The buffer design uses a 1T DRAM topology for its unit memory cell compone...
158
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ECRTS
2010
IEEE
15 years 1 months ago
2010
IEEE
Embedded control systems with hard real-time constraints require that deadlines are met at all times or the system may malfunction with potentially catastrophic consequences. Sched...
WMPI
2004
ACM
15 years 5 months ago
2004
ACM
This paper discusses die cost vs. performance tradeoffs for a PIM system that could serve as the memory system of a host processor. For an increase of less than twice the cost of ...