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BWCCA
2010
14 years 9 months ago
Advanced Design Issues for OASIS Network-on-Chip Architecture
Network-on-Chip (NoC) architectures provide a good way of realizing efficient interconnections and largely alleviate the limitations of bus-based solutions. NoC has emerged as a so...
Kenichi Mori, Adam Esch, Abderazek Ben Abdallah, K...
111
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ICPP
2008
IEEE
15 years 8 months ago
Optimizing Issue Queue Reliability to Soft Errors on Simultaneous Multithreaded Architectures
The issue queue (IQ) is a key microarchitecture structure for exploiting instruction-level and thread-level parallelism in dynamically scheduled simultaneous multithreaded (SMT) p...
Xin Fu, Wangyuan Zhang, Tao Li, José A. B. ...
FPGA
1997
ACM
160views FPGA» more  FPGA 1997»
15 years 6 months ago
Architecture Issues and Solutions for a High-Capacity FPGA
ct High-capacity FPGAs pose device architects with a variety of problems. The most obvious of these problems is interconnect capacity. Others include interconnect performance, cloc...
Steven Trimberger, Khue Duong, Bob Conn
LCPC
2004
Springer
15 years 7 months ago
Branch Strategies to Optimize Decision Trees for Wide-Issue Architectures
Abstract. Branch predictors are associated with critical design issues for nowadays instruction greedy processors. We study two important domains where the optimization of decision...
Patrick Carribault, Christophe Lemuet, Jean-Thomas...
WSC
2001
15 years 3 months ago
Security issues in high level architecture based distributed simulation
The United States Department of Defense (DoD) has, over the past several years, emphasized the need to employ simulation based acquisition (SBA) in engineering and development. Di...
Asa Elkins, Jeffery W. Wilson, Denis Gracanin