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ISSS
2000
IEEE
127views Hardware» more  ISSS 2000»
15 years 9 months ago
Lower Bound Estimation for Low Power High-Level Synthesis
This paper addresses the problem of estimating lower bounds on the power consumption in scheduled data flow graphs with a fixed number of allocated resources prior to binding. T...
Lars Kruse, Eike Schmidt, Gerd Jochens, Ansgar Sta...
RTSS
2000
IEEE
15 years 9 months ago
Performance Specifications and Metrics for Adaptive Real-Time Systems
While early research on real-time computing was concerned with guaranteeing avoidance of undesirable effects such as overload and deadline misses, adaptive real-time systems are d...
Chenyang Lu, John A. Stankovic, Tarek F. Abdelzahe...
ASIACRYPT
1999
Springer
15 years 9 months ago
Equivalent Keys of HPC
This paper presents a weakness in the key schedule of the AES candidate HPC (Hasty Pudding Cipher). It is shown that for the HPC version with a 128-bit key, 1 in 256 keys is weak i...
Carl D'Halluin, Gert Bijnens, Bart Preneel, Vincen...
ICCAD
1998
IEEE
109views Hardware» more  ICCAD 1998»
15 years 9 months ago
CORDS: hardware-software co-synthesis of reconfigurable real-time distributed embedded systems
Field programmable gate arrays (FPGAs) are commonly used in embedded systems. Although it is possible to reconfigure some FPGAs while an embedded system is operational, this featu...
Robert P. Dick, Niraj K. Jha
DEXA
1998
Springer
90views Database» more  DEXA 1998»
15 years 9 months ago
On the Correctness of a Transaction Model for Mobile Computing
We discuss and prove the correctness of a transaction model for mobile computing. In our transaction model, we incorporate a prewrite operation (before a write) which does not upda...
Sanjay Kumar Madria, Bharat K. Bhargava
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