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EMSOFT
2004
Springer
15 years 10 months ago
A methodology for generating verified combinatorial circuits
High-level programming languages offer significant expressivity but provide little or no guarantees about resource use. Resourcebounded languages -- such as hardware-description l...
Oleg Kiselyov, Kedar N. Swadi, Walid Taha
ICSE
2000
IEEE-ACM
15 years 10 months ago
Reverse engineering: a roadmap
By the early 1990s the need for reengineering legacy systems was already acute, but recently the demand has increased significantly with the shift toward web-based user interfaces...
Hausi A. Müller, Jens H. Jahnke, Dennis B. Sm...
ISCA
1991
IEEE
162views Hardware» more  ISCA 1991»
15 years 10 months ago
Comparison of Hardware and Software Cache Coherence Schemes
We use mean value analysis models to compare representative hardware and software cache coherence schemes for a large-scale shared-memory system. Our goal is to identify the workl...
Sarita V. Adve, Vikram S. Adve, Mark D. Hill, Mary...
DAC
2005
ACM
15 years 8 months ago
Smart diagnostics for configurable processor verification
This paper describes a novel technique called Embedded Test-bench Control (ETC), extensively used in the verification of Tensilica’s latest configurable processor. Conventional ...
Sadik Ezer, Scott Johnson
SAC
2010
ACM
15 years 8 months ago
Reactive parallel processing for synchronous dataflow
The control flow of common processors does not match the specific needs of reactive systems. Key issues for these systems are preemption and concurrency, combined with timing pred...
Claus Traulsen, Reinhard von Hanxleden