95 search results - page 4 / 19 » Jitter in Ring Oscillators |
ASYNC
2001
IEEE
15 years 3 months ago
2001
IEEE
The GasP family of asynchronous circuits provides controls for simple pipelines, for branching and joining pipelines, for round-robin scatter and gather, for datadependent scatter...
106
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ISQED
2010
IEEE
14 years 9 months ago
2010
IEEE
This paper studies multi-core clock distribution using active deskewing methods. We propose an efficient methodology that uses Verilog-A to model PLLs, clock trees and power suppl...
ISCAS
2006
IEEE
15 years 5 months ago
2006
IEEE
—A low-latency, HDL-synthesizable dynamic clock frequency controller is presented as a time-efficient alternative to full-custom implementations. Frequency division of a fully in...
FPL
2006
Springer
15 years 3 months ago
2006
Springer
This paper describes a solution for the generation of true random numbers in a purely digital fashion; making it suitable for any FPGA type, because no FPGA vendor specific featur...
116
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ISLPED
2000
ACM
15 years 4 months ago
2000
ACM
This paper presents a framework for CMOS ring oscillator phase noise analysis for given power consumption specifications. This model considers both linear and nonlinear operation...