Sciweavers

277 search results - page 53 / 56
» Just-In-Time Scheduling with Constraint Programming
Sort
View
97
Voted
ASPDAC
2005
ACM
81views Hardware» more  ASPDAC 2005»
15 years 2 months ago
Design and design automation of rectification logic for engineering change
In a later stage of a VLSI design, it is quite often to modify a design implementation to accommodate the new specification, design errors, or to meet design constraints. In addit...
Cheng-Hung Lin, Yung-Chang Huang, Shih-Chieh Chang...
CP
2008
Springer
15 years 1 months ago
Search Strategies for Rectangle Packing
Rectangle (square) packing problems involve packing all squares with sizes 1 × 1 to n × n into the minimum area enclosing rectangle (respectively, square). Rectangle packing is a...
Helmut Simonis, Barry O'Sullivan
199
Voted
GIS
2007
ACM
16 years 1 months ago
Evacuation route planning: scalable heuristics
Given a transportation network, a vulnerable population, and a set of destinations, evacuation route planning identifies routes to minimize the time to evacuate the vulnerable pop...
Sangho Kim, Betsy George, Shashi Shekhar
104
Voted
ICALP
2009
Springer
15 years 7 months ago
Improved Bounds for Speed Scaling in Devices Obeying the Cube-Root Rule
Speed scaling is a power management technique that involves dynamically changing the speed of a processor. This gives rise to dualobjective scheduling problems, where the operating...
Nikhil Bansal, Ho-Leung Chan, Kirk Pruhs, Dmitriy ...
111
Voted
LCTRTS
2007
Springer
15 years 7 months ago
Tetris: a new register pressure control technique for VLIW processors
The run-time performance of VLIW (very long instruction word) microprocessors depends heavily on the effectiveness of its associated optimizing compiler. Typical VLIW compiler pha...
Weifeng Xu, Russell Tessier