45 search results - page 5 / 9 » KCube: A novel architecture for interconnection networks |
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MICRO
2008
IEEE
15 years 4 months ago
2008
IEEE
As chip multiprocessors scale to a greater number of processing cores, on-chip interconnection networks will experience dramatic increases in both bandwidth demand and power dissi...
ERSA
2009
14 years 7 months ago
2009
We present the architecture and programming model for MORA, a coarse-grained reconfigurable processor aimed at multimedia applications. The MORA architecure is a MIMD machine consi...
FPL
2008
Springer
14 years 11 months ago
2008
Springer
FPGA devices have witnessed popularity in their use for the rapid prototyping of biological Spiking Neural Network (SNNs) applications, as they offer the key requirement of reconf...
ISNN
2007
Springer
15 years 3 months ago
2007
Springer
This paper proposes novel hierarchical self-organizing associative memory architecture for machine learning. This memory architecture is characterized with sparse and local interco...
FPGA
1997
ACM
15 years 1 months ago
1997
ACM
This paper presents a novel system architecture applicable to high-performance and flexible transport data processing which includes complex protocol operation and a network contr...