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CHARME
2001
Springer
117views Hardware» more  CHARME 2001»
15 years 4 months ago
A Higher-Level Language for Hardware Synthesis
We describe SAFL+: a call-by-value, parallel language in the style of ML which combines imperative, concurrent and functional programming. Synchronous channels allow communication ...
Richard Sharp, Alan Mycroft
IFL
2001
Springer
146views Formal Methods» more  IFL 2001»
15 years 4 months ago
Optimizations on Array Skeletons in a Shared Memory Environment
Map- and fold-like skeletons are a suitable abstractions to guide parallel program execution in functional array processing. However, when it comes to achieving high performance, i...
Clemens Grelck
INFOCOM
2000
IEEE
15 years 4 months ago
Understanding the Performance of TCP Pacing
Abstract—Many researchers have observed that TCP’s congestion control mechanisms can lead to bursty traffic flows on modern high-speed networks, with a negative impact on ove...
Amit Aggarwal, Stefan Savage, Thomas E. Anderson
DEXA
2000
Springer
95views Database» more  DEXA 2000»
15 years 4 months ago
Formalizing Workflows Using the Event Calculus
The event calculus is a logic programming formalism for representing events and their effects especially in database applications. This paper presents the use of the event calculus...
Nihan Kesim Cicekli, Yakup Yildirim
FM
1999
Springer
121views Formal Methods» more  FM 1999»
15 years 4 months ago
Incremental Design of a Power Transformer Station Controller Using a Controller Synthesis Methodology
ÐIn this paper, we describe the incremental specification of a power transformer station controller using a controller synthesis methodology. We specify the main requirements as s...
Hervé Marchand, Mazen Samaan