This paper presents how to find optimized buffer size for VLSI architectures of full-search block matching algorithms. Starting from the DG (dependency graph) analysis, we focus i...
In this paper, we propose an architecture synthesis methodolog `to realize cascaded Infinite Impulse Response (IIRJfilter in Table Look Up (TLU) Field Progmmmable Gate A m y s (FP...
We consider the problem of preprocessing an n-vertex digraph with real edge weights so that subsequent queries for the shortest path or distance between any two vertices can be efï...
The traditional use of formal methods has been for the veri cation of algorithms or protocols. Given the high cost and limitations in state space coverage provided by conventional...
This paper presents a realization for the reliable and fast startup of distributed systems written in Erlang. The traditional startup provided by the Erlang/OTP library is sequenti...