Sciweavers

911 search results - page 28 / 183
» Kolmogorov Complexity Cores
Sort
View
DATESO
2010
233views Database» more  DATESO 2010»
14 years 12 months ago
Efficient Implementation of XPath Processor on Multi-Core CPUs
Abstract. Current XPath processors use direct approach to query evaluation which is quite inefficient in some cases and usually implemented serially. This may be a problem in case ...
Martin Krulis, Jakub Yaghob
ISCA
2009
IEEE
136views Hardware» more  ISCA 2009»
15 years 8 months ago
Architectural core salvaging in a multi-core processor for hard-error tolerance
The incidence of hard errors in CPUs is a challenge for future multicore designs due to increasing total core area. Even if the location and nature of hard errors are known a prio...
Michael D. Powell, Arijit Biswas, Shantanu Gupta, ...
MSE
2003
IEEE
103views Hardware» more  MSE 2003»
15 years 7 months ago
Teaching IP Core Development: An Example
The increasing gap between design productivity and chip complexity, and emerging systems-on-a-chip (SoC) have led to the wide utilization of reusable intellectual property (IP) co...
Aleksandar Milenkovic, David Fatzer
FPGA
2001
ACM
137views FPGA» more  FPGA 2001»
15 years 6 months ago
Detailed routing architectures for embedded programmable logic IP cores
As the complexity of integrated circuits increases, the ability to make post-fabrication changes to fixed ASIC chips will become more and more attractive. This ability can be real...
Peter Hallschmid, Steven J. E. Wilton
ISCAS
2008
IEEE
133views Hardware» more  ISCAS 2008»
15 years 8 months ago
A hybrid self-testing methodology of processor cores
—Software-based self-test (SBST) is a promising new technology for at-speed testing of embedded processors in SoC systems. This paper introduces an effective and efficient new ho...
Tai-Hua Lu, Chung-Ho Chen, Kuen-Jong Lee