In this paper we summarize parallel algorithms for enumerative model checking of properties formulated in linear time temporal logic (LTL) as well as a fragment of the µcalculus ...
In this paper, a uniform approach for synthesizing monitors checking correctness properties specified in linear-time logics at runtime is provided. Therefore, a generic three-value...
Boolean circuits offer a natural, structured, and compact representation of Boolean functions for many application domains. In this paper a tableau method for solving satisfiabilit...
Abstract. CirCUs is a satisfiability solver that works on a combination of AndInverter-Graph, CNF clauses, and BDDs. It has been designed to work well with bounded model checking. ...
The problem of checking the equivalence of combinational circuits is of key significance in the verification of digital circuits. In recent years, several approaches have been pro...