499 search results - page 39 / 100 » LTL satisfiability checking |
ASYNC
2002
IEEE
15 years 4 months ago
2002
IEEE
Wire and gate delays are accounted to have equal, or nearly equal, effect on circuit behavior in modern design techniques. This paper introduces a new approach to verify circuits ...
AGP
1998
IEEE
15 years 4 months ago
1998
IEEE
We compare two (apparently) rather different set-based constraint languages, and we show that, in spite of their different origins and aims, there are large classes of constraint ...
AAECC
2007
Springer
15 years 6 months ago
2007
Springer
We consider a generalization of the codes defined by norm and trace functions on finite fields introduced by Olav Geil. The codes in the new family still satisfy Geil’s dualit...
FORMATS
2008
Springer
15 years 1 months ago
2008
Springer
Metric Temporal Logic (MTL) is a widely-studied real-time extension of Linear Temporal Logic. In this paper we survey results about the complexity of the satisfiability and model c...
TAP
2008
Springer
14 years 11 months ago
2008
Springer
Abstract. In recent years, we see a growing awareness to the importance of assessing the quality of specifications. In the context of model checking, this can be done by analyzing ...