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PEPM
2009
ACM
16 years 12 months ago
Static Consistency Checking for Verilog Wire Interconnects
The Verilog hardware description language has padding semantics that allow designers to write descriptions where wires of different bit widths can be interconnected. However, many ...
Cherif Salama, Gregory Malecha, Walid Taha, Jim Gr...
CIKM
2006
Springer
15 years 3 months ago
Heuristic containment check of partial tree-pattern queries in the presence of index graphs
The wide adoption of XML has increased the interest of the database community on tree-structured data management techniques. Querying capabilities are provided through tree-patter...
Dimitri Theodoratos, Stefanos Souldatos, Theodore ...
SIGSOFT
2003
ACM
15 years 5 months ago
Fluent model checking for event-based systems
Model checking is an automated technique for verifying that a system satisfies a set of required properties. Such properties are typically expressed as temporal logic formulas, in...
Dimitra Giannakopoulou, Jeff Magee
TABLEAUX
1998
Springer
15 years 4 months ago
Model Checking: Historical Perspective and Example (Extended Abstract)
ple (Extended Abstract) Edmund M. Clarke and Sergey Berezin Carnegie Mellon University -- USA Model checking is an automatic verification technique for finite state concurrent syst...
Edmund M. Clarke, Sergey Berezin
VLSID
2008
IEEE
122views VLSI» more  VLSID 2008»
16 years 7 days ago
A Module Checking Based Converter Synthesis Approach for SoCs
Protocol conversion involves the use of a converter to control communication between two or more protocols such that desired system-level specifications can be satisfied. We invest...
Roopak Sinha, Partha S. Roop, Samik Basu