499 search results - page 64 / 100 » LTL satisfiability checking |
117
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FAC
2008
15 years 2 months ago
2008
Abstract. In this paper we consider the relationship between refinement-oriented specification and specifications using a temporal logic. We investigate the extent to which one can...
108
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TVLSI
2008
15 years 1 months ago
2008
ion levels. The framework also supports the generation of test constraints, which can be satisfied using a constraint solver to generate tests. A compositional verification approac...
131
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FMSD
2010
15 years 15 days ago
2010
Abstract Modeling and Simulation Aided Verification of Analog/MixedSignal Circuits S. Little and C. Myers (University of Utah, USA) Monday, July 14, 14:00-17:00 4 14:00-14:40 fSpic...
128
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TSMC
2010
14 years 8 months ago
2010
Traditional planning assumes reachability goals and/or full observability. In this paper, we propose a novel solution for safety and reachability planning with partial observabilit...
107
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CAV
2009
Springer
15 years 8 months ago
2009
Springer
The DPLL approach to the Boolean satisfiability problem (SAT) is a combination of search for a satisfying assignment and logical deduction, in which each process guides the other....