499 search results - page 64 / 100 » LTL satisfiability checking |
FAC
2008
14 years 12 months ago
2008
Abstract. In this paper we consider the relationship between refinement-oriented specification and specifications using a temporal logic. We investigate the extent to which one can...
TVLSI
2008
14 years 11 months ago
2008
ion levels. The framework also supports the generation of test constraints, which can be satisfied using a constraint solver to generate tests. A compositional verification approac...
106
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FMSD
2010
14 years 10 months ago
2010
Abstract Modeling and Simulation Aided Verification of Analog/MixedSignal Circuits S. Little and C. Myers (University of Utah, USA) Monday, July 14, 14:00-17:00 4 14:00-14:40 fSpic...
102
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TSMC
2010
14 years 6 months ago
2010
Traditional planning assumes reachability goals and/or full observability. In this paper, we propose a novel solution for safety and reachability planning with partial observabilit...
CAV
2009
Springer
15 years 6 months ago
2009
Springer
The DPLL approach to the Boolean satisfiability problem (SAT) is a combination of search for a satisfying assignment and logical deduction, in which each process guides the other....