There has been a lot of discussion, and a lot of confusion, about the various existing and new design languages recently. SystemC, SystemVerilog, Verilog2005, e, Vera, PSL/Sugar, ...
Abstract— To meet the challenge of increasing design complexity, designers are turning to system level design languages to model systems at a higher level of abstraction. This pa...
This paper presents a language dedicated to the description of the software architecture of complex embedded control systems. The language relies on the synchronous approach but e...
There is an increasing research interest in system level design languages which can carry designers from specification to implementation of system-on-a-chip. Unfortunately, two of...
An executable computational logic can provide the desired bridge between formal system properties and formal methods to verify them on the one hand, and executable models of syste...